vm-kernel

I think most of you may think it is easy to emulate I2C device in qemu, for qemu has provided a framework of i2c, both the master and slave devices. You are right. Emulating the I2C is not difficult in qemu.
What I want to post here is not emulating I2C device directly, but emulating GPIO [...]

I have an extra gdium pcb board with uart interface from fred. Thanks .
Today I try to compile the kernel by myself and the new kernel works well except for network card. I can not see eth0 using ifconfig command. Then I check the pci list of my gdium PCB and find the RTL8139D [...]

New version of qemu does not support MIPS host anymore.
For the sake of portability, the new version of qemu uses TCG, a tiny code generator, instead of dyngen to generate host code. That means one backend is needed for each host architecture. There are i386,x86_64,ppc,ppc64 and hppa backend in TCG, but MIPS is not on [...]

Although Vincent has given us a how to article of debian on gdium, but there are some detailed things missed. So I rewrite it here with some more detailed steps.
(1) Prepare the new USB disk
Format the new USB disk with at least tow partitions, one is ext2 partition for the root file system and the [...]

This morning I eventually received my gdium liberty 1000 from zjs express, nearly 5 days after its shipping! Last time I use sf express to ship my mp4 player to Beijing in less than 2 days. I understand, because of the battery stuff can not be shipped by airline, but 5 days is excessive for [...]

I have spent about 1 month in making linux run on onda vx747 and it works now. Although it is a achievement, it's not the end of project jz-hacking.
These days I am always thinking about bringing virtualization into MIPS's world. You know, xen has been ported into ARM by Samsung and kvm into PPC by [...]

1. About jz4740 DMA
JZ4740 has 2 groups of DMA, 4 channels in each group. The default prority is channel 0 has the highest priority and channel 7 has the loweset priority.
Channel 0 is used for SLCD and channel 2/3 are used for MMC TX/RX. Because the SLCD DMA is busy transmitting data from frame buffer [...]

Before reading this article, please please visit the following website and help this little girl. She is the daughter of panjet, the core member of this project. Without him, this project can not even happen.
http://yifanfund.com (English)
在阅读这篇文章前, 我恳请您花一点时间来帮助panjet的女儿怡帆. Panjet是这个项目的核心成员.如果没有他的参与,这个项目不可能成功地port linux到vx747上面. 赠人玫瑰,手留余香.  您的爱心一定能让小怡帆度过目前的困难.
http://help-yifan.org (中文)

Hi guys, a good news for you who are interested in running linux [...]

In MIPS, cause register is responsible for telling CPU which interrupt is happening. CPU read the IP bits in cause register and dispatch interrupt to interrupt service routine.
One question: who is responsible for clear IP bits in cause register? That is interrupt handler. Interrupt handler must clear the corresponding IP bit in cause register, othewise [...]

Caution: This article is out-dated. You can find the new how to in rockbox's wiki.
This article describes how to run rockbox on vx747 and vx747+.
1. Download rockbox from daily archive or svn. I use the svn version 19703.
2. build the toolchain. You can build the toolchain from ingenic or use the script in rockbox to [...]